Automated topology synthesis for analog integrated circuits

Zhao, Zhenxin (2022) Automated topology synthesis for analog integrated circuits. Doctoral (PhD) thesis, Memorial University or Newfoundland.

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Currently, except for circuit topology synthesis, all the other phases in the analog integrated circuit design procedure are equipped with electronic design automation (EDA) commercial tools to greatly facilitate the human laborious work and significantly improve the design productivity, even though they are still not as mature as digital EDA counterparts. This dissertation focuses on developing a circuit topology synthesis EDA tool for analog integrated circuits. In order to make the developed EDA tool commercializable, there are many challenges that have to be solved, including trustworthy solutions, innovative solutions, wide applicability, sound generalization capability, and affordable computation effort. This thesis proposes a graph-based generation method to automatically synthesize analog integrated circuits, which has partially solved some challenges. But one serious problem of this method is its unaffordable computation effort due to the time-consuming sizing process for a huge number of generated circuit structures. To address this problem, we propose a novel performance modeling method that can boost the sizing efficiency by more than 30 times with ignorable model building overhead, which is especially suitable for the circuit synthesis work that involves generating various circuit structures. With the assistance of the emerging machine learning advancement, EDA tools can be more efficient and effective. We have employed the deep reinforcement learning technique in this dissertation to synthesize analog integrated circuit structures. Its technical merits make it be able to address those pending challenges much better than the graph-based generation method. But it still suffers from a shortcoming, that is, the learning process has to be performed from scratch once the technology or design specification changes. In order to overcome this shortcoming, the transfer learning technique is applied to transfer the learned knowledge from a learning process to another in order to largely save the learning effort. The experimental results exhibit strong efficacy and great applicability of our proposed methods.

Item Type: Thesis (Doctoral (PhD))
Item ID: 15733
Additional Information: Includes bibliographical references (pages 147-157)
Keywords: electronic design automation, analog circuit topology synthesis, performance modeling, circuit isomorphism, symbolic analysis, deep reinforcement learning, transfer learning
Department(s): Engineering and Applied Science, Faculty of
Date: May 2022
Date Type: Submission
Digital Object Identifier (DOI):
Library of Congress Subject Heading: Analog integrated circuits--design; Reinforcement learning; Transfer learning (Machine learning); Topology; Symbolic circuit analysis

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