An advanced graph-based placement representation for analog layout design

He, Lian (2021) An advanced graph-based placement representation for analog layout design. Masters thesis, Memorial University of Newfoundland.

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Due to complexity and susceptibility of analog layouts towards circuit performance, maturity state of analog integrated circuit (IC) physical design automation has largely lagged behind that of the digital counterpart. Placement is an indispensable stage in the analog IC layout design. It demands effective representations to handle nontrivial analog placement topologies especially in the advanced nanometer technologies. In this thesis, we mainly review the existing placement representations and deepen the research of topological representations for the analog placement design. By leveraging the equivalence between sequence pair (SP) and transitive closure graph (TCG), we propose an SP-driven TCG representation and its associated operations to facilitate the handling of analog placement constraints. To achieve the symmetry-aware placement, we introduce a set of special symmetric-feasible conditions and define an efficient construction mechanism for symmetric placement with the SP-driven TCG representation. A set of SP-driven perturbation operations is also brought forth in this thesis to reduce the algorithmic complexity while satisfying symmetry constraints. Furthermore, a redundancy control scheme among the representation states is developed in order to generate high-performance analog placement with high computation efficiency. Based on the SP-driven TCG representation, we further introduce an Advanced Transitive-Closure-Graph-based placement representation (ATCG). It can effectively and efficiently tackle advanced geometric constraints, which are highly essential for addressing layout dependent effects, thermal effects, and diverse parasitic challenges in the advanced nanometer technologies. ATCG not only inherits all the advantage from both SP and TCG, but also resolve the ambiguous diagonal relationship between any two specified modules. The versatility and flexibility of ATCG can ensure it to accurately control spacing and merging constraints uniquely required by analog layout design. We have implemented our proposed placement methods and tested them with several circuits. Our experimental results demonstrate high efficacy of these proposed representations and the developed operations.

Item Type: Thesis (Masters)
Item ID: 15683
Additional Information: Includes bibliographical references (pages 88-99)
Keywords: analog IC layout, design automation, placement, representation, advanced constraints, optimization
Department(s): Science, Faculty of > Computer Science
Date: May 2021
Date Type: Submission
Digital Object Identifier (DOI):
Library of Congress Subject Heading: Analog integrated circuits; Graph theory

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