Simulation and implementation of pulsed analog neural circuits

Banerjee, Tapas (1993) Simulation and implementation of pulsed analog neural circuits. Masters thesis, Memorial University of Newfoundland.

[English] PDF (Migrated (PDF/A Conversion) from original format: (application/pdf)) - Accepted Version Available under License - The author retains copyright ownership and moral rights in this thesis. Neither the thesis nor substantial extracts from it may be printed or otherwise reproduced without the author's permission. Download (17MB) [English] PDF - Accepted Version Available under License - The author retains copyright ownership and moral rights in this thesis. Neither the thesis nor substantial extracts from it may be printed or otherwise reproduced without the author's permission. (Original Version)

Abstract

Conventional simulation of neural networks implemented using our pulsed analog topology is slow. The commercial circuit simulator HSPICE takes about half a day to simulate even a medium scale network, which is frustrating at the design stage. A new simulator, PULSE, has been developed to relieve the designer from this problem. PULSE provides about two orders of speed improvement over HSPICE while predicting the circuit, performance with comparable accuracy. It uses a macromodeling approach in contrast to the transistor level simulation approach in HSPICE. Special features of pulsed analog networks are exploited constantly to reduce the simulation time. The analysis algorithms used are Waveform Gauss-Seidel and Functional iteration. Circuit equations formulated being very sparse, correct ordering of the equations leads to convergence to the solution in only one Gauss-Seidel iteration. Using PULSE as the simulation tool, a Matrix Associative Memory has also been designed which is in the process of fabrication.

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