Development of multi-MHz Class-D soft-switching inverters

Tebianian, Hamed (2020) Development of multi-MHz Class-D soft-switching inverters. Doctoral (PhD) thesis, Memorial University of Newfoundland.

[English] PDF - Accepted Version Available under License - The author retains copyright ownership and moral rights in this thesis. Neither the thesis nor substantial extracts from it may be printed or otherwise reproduced without the author's permission. Download (6MB)

Abstract

Wireless Power Transmission (WPT) systems are becoming rapidly mature and accessible to customers, and it is expected that they are going to take a large share of the electrical equipment market around the world in the near future. Many tech companies and university research labs have recently focused on design, development, and optimization of different blocks of these systems. WPT systems can be designed to transfer power either through electric fields or magnetic fields. Operating at the multi-MHz frequency will bring about the smaller size of the wireless link for both types of WPT systems. The advent of Wide Bandgap (WBG) devices like Gallium Nitride (GaN) FETs and Silicon Carbide (SiC) MOSFETs has paved the road to design multi-MHz inverters and use them as the Radio Frequency (RF) power source in the transmitter of WPT systems. Designing an efficient inverter which can maintain its soft-switching performance while facing variable load or delivering variable output power is one of the major design challenges in this field. The second challenge in this area is related to the difficulties of Electromagnetic Compatibility (EMC) of the inverter, which is the direct result of operating at MHz switching frequency range. The Electromagnetic Interference (EMI) level can be reduced by designing a stronger filter or trying to remove the harmonics from the switching source. In this thesis, to tackle the first challenge mentioned above regarding soft switching, the Dynamic Dead-Time Control (DDTC) approach is proposed and utilized to sustain the soft-switching of a multi-MHz Full-Bridge (FB) Class-D inverter over the full range of active load and output power. Simulation results are presented to show that dynamically controlling the Dead-Time (DT) during input DC voltage control and load variations, reduces switch-node voltage overshoot, prevents large current spikes in the switching devices, and reduces associated high switching loss. Finally, experimental results obtained from the prototype of the system are provided to validate the effectiveness of the proposed approach. Then, a soft-switching multi-MHz multi-level Class-D inverter is developed to address the second challenge of EMI issues associated with MHz switching frequency operation.The inverter is designed to eliminate the 3rd and 5th harmonics from its output voltage waveform. This will, in turn, make it possible to meet EMC and achieve the same level of harmonic attenuation on the output of the inverter with a smaller size and more efficient output EMI filter as opposed to utilizing a bulky, high-order, High-Quality (HQ) filter. The impact of DT on the modulation parameters of the multi-level inverter is investigated through mathematical analysis, and the results are utilized during the system simulations and practical implementation. A prototype is built to validate the theoretical and simulation analysis on a practical testbed. The harmonic analysis comparison carried out between the experimental results obtained from the multi-level inverter and FB Class-D inverter prototypes shows how the multi-level inverter is capable of suppressing unwanted 3rd and 5th harmonic to a much lower level which in turn leads to smaller size and more efficient output filter.

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