Design development and testing of microprocessor-based prototype relay for power transformer protection

Hermanto, Ivi (1990) Design development and testing of microprocessor-based prototype relay for power transformer protection. Masters thesis, Memorial University of Newfoundland.

[English] PDF (Migrated (PDF/A Conversion) from original format: (application/pdf)) - Accepted Version Available under License - The author retains copyright ownership and moral rights in this thesis. Neither the thesis nor substantial extracts from it may be printed or otherwise reproduced without the author's permission. Download (13MB) [English] PDF - Accepted Version Available under License - The author retains copyright ownership and moral rights in this thesis. Neither the thesis nor substantial extracts from it may be printed or otherwise reproduced without the author's permission. (Original Version)

Abstract

The digital protection of electrical power apparatus has been an active area of research for the past twenty years. These research results are being utilized in some of the digital relay designs. The digital protection of power transformers requires complex calculations and logic, hence the use of a digital processor seems to be natural and attractive. -- A stand-alone prototype digital protective relay for power transformer protection has been designed, implemented and tested successfully. The prototype digital relay integrates up to three different relaying functions in a single relay. Any changes to the relay operating characteristic can be carried out simply in the software without tampering with the hardware. The relay hardware is designed in two different boards namely, the data acquisition and the digital processing boards. The data acquisition board consists of seven identical circuits each having a scaling circuit, a sixth order Chebyshev anti-aliasing filter and a sample-and-hold circuit. All the seven signals are then multiplexed and connected to an A/D converter. The digital processing board consists of a TMS320E15 digital signal processor. -- The relay software program is developed for the complete three phase percentage differential relay with second harmonic restraint for inrush and fifth harmonic restraint for overexcitation. The primary and secondary ground fault protection is also provided. The software is written in modular form such that any relay algorithm can be used by simply changing only one subroutine. The present relay design utilizes the Discrete Fourier Transform (DFT) to extract the current harmonics. -- The prototype digital relay was tested extensively in the laboratory for a duration of three months. The results of these tests show that the relay always cleared all the faults that were applied on the transformer and the relay never maloperated.

Actions (login required)

View Item