Hardware implementation of pipelined statistical cipher feedback mode

Tian, Yuanchi (2015) Hardware implementation of pipelined statistical cipher feedback mode. Masters thesis, Memorial University of Newfoundland.

[English] PDF - Accepted Version
Available under License - The author retains copyright ownership and moral rights in this thesis. Neither the thesis nor substantial extracts from it may be printed or otherwise reproduced without the author's permission.
Download (18MB)

Item Type:	Thesis (Masters)
URI:	http://research.library.mun.ca/id/eprint/11656
Item ID:	11656
Additional Information:	Includes bibliographical references (pages 107-110).
Keywords:	PSCFB, AES, ASIC, FPGA, mode of operation, encryption, hardware
Department(s):	Engineering and Applied Science, Faculty of
Date:	October 2015
Date Type:	Submission
Library of Congress Subject Heading:	Data encryption (Computer science); Stream ciphers--Design and construction; Optical communications; Computer security--Standards

Actions (login required)

View Item

Download statistics

Downloads

Downloads per month over the past year

View more statistics