Delay, fairness and complexity of selected scheduling disciplines in broadband packet-switched networks

Vellore, Padmini (2003) Delay, fairness and complexity of selected scheduling disciplines in broadband packet-switched networks. Masters thesis, Memorial University of Newfoundland.

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    Available under License - The author retains copyright ownership and moral rights in this thesis. Neither the thesis nor substantial extracts from it may be printed or otherwise reproduced without the author's permission.
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Abstract

The explosion in the size of communication networks as well as the need for integration of voice, video and data have pioneered a need for fast packet switching. The economical implementation of fast packet switching has become a reality with the recent advances in VLSI technology. This has introduced opportunities for new applications like video conferencing, that demand severe performance requirements in terms of allocated bandwidth, delay, delay jitter, and loss rate. Packet scheduling is an effort to reduce delay, delay-jitter and losses thereby providing Quality of Service to such delay- and loss-sensitive applications. -- The upshot of this research will influence the resolution of a most appropriate method of providing guaranteed but paid service to users of real-time applications like video conferencing, unlike the Internet, which is designed to provide best-effort service. Various packet-scheduling algorithms have been studied. Among the several existing packet-scheduling algorithms, Weighted Fair Queueing (WFQ) and Worst-case Fair Weighted Fair Queueing Plus (WF²Q+) are selected in this thesis for comparison based on their delay properties. The performance is investigated for both fixed-sized packets and variable-sized packets. It has been found that WF²Q+ is fair and introduces lower delay than WFQ. Due to the lower hardware as well as time complexity, WF²Q+ can be considered as a prospective algorithm for use in high-speed packet-switched networks. The performance is studied on a network with and without the presence of cross-traffic for various traffic loads. Simulation results and hardware realization are discussed. A brief canvassing on where these results lead us follows the conclusion. A proposal for future improvements is also presented.

Item Type: Thesis (Masters)
URI: http://research.library.mun.ca/id/eprint/7496
Item ID: 7496
Additional Information: Bibliography: leaves 114-117.
Department(s): Engineering and Applied Science, Faculty of
Date: 2003
Date Type: Submission
Library of Congress Subject Heading: Packet switching (Data transmission)

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